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r03ds0008ej0100 rev.1.00 page 1 of 11 sep 03, 2010 preliminary datasheet r2a20114 series continuous conducti on mode interleaving pfc control ic description r2a20114 series is a boost converter control ic with pfc (power factor correction). employing continuous conduction mode interleaving pfc, it performs higher efficiency and lower switching noise even for high power use. the control of continuous conduction mode is carried out by detecting the current in power mosfet. the r2a20114 series supports two types of current detection methods; current detection by current transformers (r2a20104sp/fp), and that by shunt resisters (r2a20114sp/fp). so that, it can be applicable for a variety of applications. interleaving control of the boost converters, namely, producing 180 degrees phase shift between the output signals (gd1,2) driving the boost converters, enables the system to perform high conversion efficiency and low switching noises and, at the same time, to reduces ripple currents in input and output current and then this allows use of smaller components such as boost inductors, input filters and output capacitors. r2a2011 4 series integrates a various kinds of protection circuits, such as the detection circuit of breaking of wire in feedback loop, two modes of over voltage protection circuits, over current protection circuit an d error output circuit (* 1 ), which improve the reliability of the power supply system and reduce the number of component parts on the system. features ? maximum ratings ? supply voltage vcc: 24 v ? operating junction temperature tjopr: from ?40 to +150 degrees centigrade ? electrical characteristics ? vfb feedback voltage vref: 2.5 v ? 1.5% ? uvlo (undervoltage lockout) oper ation start voltage vh: 10.4 v ? 0.7 v ? uvlo operation shutdown voltage vl: 8.9 v ? 0.5 v ? uvlo hysteresis voltage hysuvl : 1.5 v ? 0.5 v ? functions ? boost converter control with continuous conduction mode ? interleaving control ? frequency modulation (* 2 ) ? brownout ? phase drop (* 1 ) ? external clock synchronization input ? external clock synchronization output (* 1 ) ? two modes of over voltage protections mode 1: dynamic ovp preventing over voltage after sudden variation of load. mode 2: static ovp preventing over voltage in the period of normal operation. ? feedback loop wire breaking/open detector ? dual over voltage protection circuits (* 1 ): fb and ovp2 terminals ? current balance control ? phase 1 and phase 2 independent over current protection ? package line-up pb-free lqfp-40 (r2a20104fp, r2a20114fp) pb-free sop-20 (r2a20104sp, r2a20114sp) notes: *1 supported only by r2a20104fp and r2a20114fp *2 frequency modulation periods (dfm) of r2a20104sp and r2a20114sp are fixed. r03ds0008ej0100 rev.1.00 sep 03, 2010
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 2 of 11 sep 03, 2010 the function list of r2a20114 series item r2a20104sp r2a20104fp r2a20114sp r2a20114fp pfc control continuous conduction mode interleaving current detection method current transformer shunt resistor package sop-20 lqfp- 40 sop-20 lqfp-40 brownout detection supported supported supported supported 2nd ovp not supported supported not supported supported protection circuits phase error not supported supported not supported supported noise reduction jitter generation (frequency modulation) supported (but, frequency modulation period (dfm)(* 1 ) is fixed) supported supported (but, frequency modulation period (dfm)(* 1 ) is fixed) supported input supported support ed supported supported synchronization with external signal output not supported supported not supported supported efficiency improvement phase drop not supported supported not supported supported note: * 1 refer to the figure depicted below: switching frequency time dfm fout ffm = 1/t ordering information part no. package name package code package abbreviation taping abbreviation (quantity) remarks R2A20104FPW0 non-hf r2a20104fpw5 hf r2a20114fpw0 non-hf r2a20114fpw5 fp-40ev plqp0040jb-c fp w (2000 pcs/reel) hf r2a20104spw0 non-hf r2a20104spw5 hf r2a20114spw0 non-hf r2a20114spw5 fp-20dav prsp0020dd-b sp w (2000 pcs/reel) hf note: hf: halogen-free
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 3 of 11 sep 03, 2010 pin arrangement of r2a2 0104fp and r2a20114fp n.c. vcc ovp2 cs1 n.c. cso2 n.c. n.c. cso1 e-delay n.c. vref agnd fmr bo cs2 vac pd ss fb n.c. comp rt/sync gd1 n.c. sync-o n.c. n.c. fmc ct pgnd n.c. n.c. rs gd2 n.c. n.c. iramp error off 1 10 9 8 7 6 5 4 3 2 11 20 19 18 17 16 15 14 13 12 30 21 22 23 24 25 26 27 28 29 40 31 32 33 34 35 36 37 38 39 (top view) pin functions of r2a 20104fp and r2a20114fp pin no. pin name input/output function 1 fmr input frequency modulation setting resistor connecting terminal 2 fmc input frequency modulation se tting capacitor connecting terminal 3 vref output reference voltage output terminal 4 bo input brownout input terminal 5 vac input ac voltage input terminal 6 pd input phase drop input terminal 7 agnd ? analog ground 8 e-delay input delay of the error signal setting terminal 9, 10 n.c. ? open 11 error output error output terminal 12 off input shutdown terminal (vcc reset) 13 rs input current correction setting resistor connecting terminal 14 ss input soft start setting capacitor connecting terminal 15 comp output error amplifier output terminal (to be phase-compensated) 16 n.c. ? open 17 fb input error amplifier input termi nal (feedback voltage input terminal) 18 qvp2 input ovp2 input terminal 19-21 n.c. ? open 22 iramp input ramp waveform setting resistor connecting terminal 23 cso2 output current sense amplifier 2 output terminal (to be phase-compensated) 24 cso1 output current sense amplifier 1 output terminal (to be phase-compensated) 25 cs2 input current sense 2 input terminal 26 cs1 input current sense 1 input terminal 27 n.c. ? open 28 vcc input supply voltage terminal 29-31 n.c. ? open 32 gd2 output converter 2 power mosfet drive terminal 33 pgnd ? power ground 34 gd1 output converter 1 power mosfet drive terminal 35 n.c. ? open 36 sync-o output synchronization signal output terminal 37 rt/sync input frequency setting resistor connecting terminal / sync. signal input terminal 38 ct input frequency setting capacitor connecting terminal 39, 40 n.c. ? open
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 4 of 11 sep 03, 2010 pin arrangement of r2 a20104sp and r2a20114sp (top view) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 cs2 cs1 gd1 ss vcc gd2 cso2 ct pgnd fb comp cso1 agnd rs vref rt/sync iramp vac fm bo pin functions of r2 a20104sp and r2a20114sp pin no. pin name input/output function 1 rt/sync input frequency setting timing resistor connecting terminal / sync. signal input terminal 2 ct input frequency setting timing capacitor connecting terminal 3 fm input frequency modulation setting timing capacitor connecting terminal 4 vref output reference voltage output terminal 5 bo input brownout input terminal 6 vac input ac voltage input terminal 7 agnd ? analog ground 8 rs input current correction setting resistor connecting terminal 9 ss input soft start setting capacitor connecting terminal 10 comp output error amplifier output terminal (to be phase-compensated) 11 fb input error amplifier input termi nal (feedback voltage input terminal) 12 iramp input ramp waveform setting resistor connecting terminal 13 cso2 output current sense amplifier 2 output terminal (to be phase-compensated) 14 cso1 output current sense amplifier output 1 output terminal (to be phase-compensated) 15 cs2 input current sense 2 input terminal 16 cs1 input current sense 1 input terminal 17 vcc input supply voltage terminal 18 gd2 output converter 2 power mosfet drive terminal 19 pgnd ? power ground 20 gd1 output converter 1 power mosfet drive terminal
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 5 of 11 sep 03, 2010 block diagram of r2a20104fp and r2a20114fp protection block interleave logic 1 interleave logic 2 current forming block 1 current forming block 2 vcc cs2 sync-o fmc agnd notes: * 1. r2a20104fp: 3v r2a20114fp: 0.31v * 2. r2a20104fp: 800na r2a20114fp: 200na vcc ocp1 ocp2 uvl vref ocp1 ocp2 2.5v osc1 osc2 e-amp 500na 28a vref vref 300na uvl bo 4 rt/sync 37 ct 38 fmr 1 25 cs1 26 28 vref 3 gd1 34 iramp 22 gd2 32 fb 17 comp 15 ss 14 0.82v/0.81v 3v/0.31v ( * 1 ) 4v vcc ovp2 18 36 pd 6 error 11 2.5v pgnd 33 200na 2 latch (uvl reset) e-delay 8 off 12 vref cso2 23 cso1 24 fb rs 13 vac 7 uvl 100k ocp1 ocp2 10k uvl gd1 gd2 3v/0.31v ( * 1 ) 800na/200na (* 2 ) 800na /200na (* 2 ) 5.7v osc1 osc2 osc1 osc2 ct sync-o sync-o sovp fbopen ovp2 dovp 5 error block
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 6 of 11 sep 03, 2010 block diagram of r2 a20104sp and r2a20114sp current forming block 1 current forming block 2 vcc rt/sync comp fm agnd vcc ocp1 ocp2 uvl vref ocp1 ocp2 2.5v osc1 osc2 e-amp 500na 28a vref vref 300na uvl cs2 15 bo cs1 16 0.82v/0.81v 3v/0.31v (* 1 ) 4v vcc vref cso1 fb uvl 10k uvl 3v/0.31v (* 1 ) 800na/200na (* 2 ) 800na /200na (* 2 ) 5.7v osc1 osc2 osc1 osc2 ct sovp fbopen dovp 14 vac 6 rs 8 cso2 13 5 1 ct 2 3 7 ss 9 10 fb 11 pgnd 19 gd2 18 gd1 20 vref 4 17 iramp 12 interleave logic 2 interleave logic 1 protection block notes: * 1. r2a20104sp: 3v r2a20114sp: 0.31v * 2. r2a20104sp: 800na r2a20114sp: 200na
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 7 of 11 sep 03, 2010 absolute maximum ratings item symbol value unit note supply voltage vcc ?0.3 to +24 v 3 peak current ipk-gd1, ipk-gd2 ? 1 a 3, 4 gd1 and 2 dc current idc-gd1, idc-gd2 ? 0.1 a 3 vref terminal current iref ?5 ma 3 terminal current it-group ? 1 ma 3, 5 rs terminal current irs ?500 ? a 3 rt terminal current irt ?200 ? a 3 ramp terminal current iramp ?200 ? a 3 bo clamp current ibo 300 ? a 3 terminal voltage vt-group ?0.3 to vref v 3, 6 vref terminal voltage vt-ref ?0.3 to vref+0.3 v 3 ss terminal voltage vt-ss ?0.3 to vref+1 v 3 power dissipation pt 1 w 3, 7 operating junction temperatur e tj-opr ?40 to +150 c storage temperature tstg ?55 to +150 c notes: 1. rated voltages are with re ference to the agnd and pgnd terminal. 2. for the direction of rated curr ents, (+) denotes the current flowing in to the ic, and (?) denotes the current flowing out of the ic. 3. ambience temperature, ta is 25 degrees centigrade. 4. transient current when driving a capacitive load. 5. rated currents of t he terminals listed below: comp, cso1, cso2 6. rated voltages of t he terminals listed below: in the case of r2a20104fp/r2a20114fp: cs1, cs 2, vac, rs, fb, pd, bo, error, e-dlay, off, ovp2, fmc, fmr, rt/sync, iramp, sync-o, ct, comp, cso1, cso2 in the case of r2a20104sp/r2a20114sp: cs1, cs 2, vac, rs, fb, bo, iramp, fm, rt/sync, ct, comp, cso1, cso2 7. thermal resistor in the case of r2a20104fp/r2a20114fp: ? ja = 85.3 degrees centigrade/w in the case of r2a20104sp/r2a20114sp: ? ja = 120 degrees centigrade/w these values are obtained under the co ndition that the ic is mounted on the glass epoxy board, of which size is 50 ? 50 ? 1.6 [mm] and wiring density is 10%.
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 8 of 11 sep 03, 2010 electrical characteristics (ta = 25c, vcc = 12 v, ct = 1000 pf, rt = 27 k ? , cs1, cs2 = gnd, iramp = 10 k ? , bo = 1 v, vac = 0 v, rs = 220 k ? , fmc = gnd (* 1 ), fm = gnd (* 2 ), fb = comp) item symbol min typ max unit test conditions uvlo turn-on threshold vuvlh 9.7 10.4 11.1 v uvlo turn-off threshold vuvll 8.4 8.9 9.4 v uvlo hysteresis hysuvl 1.0 1.5 2.0 v standby current istby ? 100 160 ? a vcc = 8.9 v supply operating current icc ? 5 7.5 ma output voltage vref 4.85 5.00 5.15 v isource = ?1 ma line regulation vref-line ? 5 20 mv isource = ?1 ma, vcc = 10 v to 24 v load regulation vref-load ? 5 20 mv isource = ?1 ma to -5 ma vref temperature stability dvref ? ? 80 ? ppm/c ta = ?40 to 125c ( * 3 ) feedback voltage vfb 2.462 2.500 2.538 v fb-comp short input bias current ifb ?0.8 ?0.5 ?0.2 ? a measured pin: fb open loop gain av ? 40 ? db ( * 3 ) upper clamp voltage vclamp-comp 3.8 4.0 4.3 v fb = 2.0 v, comp: open low voltage vl-comp 0.0 0.1 0.3 v fb = 3.0 v, comp: open source current isrc-comp ?190 ?135 ?80 ? a fb = 1.5 v, comp = 2.5 v sink current 1 isnk-comp1 ? 120 ? ? a ( * 3 ) sink current 2 isnk-comp2 220 320 420 ? a fb =3.5 v, comp = 2.5 v error amplifier transconductance gm 120 200 290 ? s fb = 2.45 v ? 2.55 v, comp = 2.5 v pfc enable voltage von-pfc 0.74 0.82 0.9 v input pin: bo brownout pfc disable voltage voff-pfc 0.73 0.81 0.89 v input pin: bo initial accuracy fout 70 78 86 khz measured pin: out, fmc = 0 v fout temperature stability dfout/dta ? ? 0.1 ? %/c ta = ?40 to 125c ( * 3 ) fout voltage stability fout-line ?1.5 0.5 1.5 % vcc = 12 v to 18 v ct top voltage vct-h ? 3.6 4.0 v ( * 3 ) rt voltage vrt 1.15 1.25 1.35 v fmc sink current ( * 1 )/ fm sink current ( * 2 ) isnk-fmc ( * 1 )/ isnk-fm ( * 2 ) 6 11 16 ? a fmc = 1 v ( * 1 )/ fm = 1 v ( * 2 ) fmc source current ( * 1 )/ fm source current ( * 2 ) iso-fmc ( * 1 )/ iso-fm ( * 2 ) ?16.5 ?11.5 ?6.5 ? a fmc = 1 v ( * 1 )/ fm = 1 v ( * 2 ) fm magnitude change dfm 19 24 29 khz fmc = 5 v ( * 1 )/fm = 5 v ( * 2 ) ( * 3 , * 4 ) fm frequency 1 ( * 1 ) ffm1 0.25 0.38 0.5 khz fmc = 6.8 nf, fmr = 4 v ( * 4 ) fm frequency 2 ( * 1 ) ffm2 14 25 35 khz fm = 220 pf, fmr = 1.2 v ( * 4 ) oscillator fm frequency ( * 2 ) ffm 6 10 14 khz fmc = 220 pf ( * 4 ) notes: * 1 applied to r2a20104fp, r2a20114fp * 2 applied to r2a20104sp, r2a20114sp * 3 design specification (reference data) * 4 refer to the figure shown below: switching frequency time dfm ffm = 1/t fout
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 9 of 11 sep 03, 2010 electrical characteristics (cont.) (ta = 25c, vcc = 12 v, ct = 1000 pf, rt = 27 k ? , cs1, cs2 = gnd, iramp = 10 k ? , bo = 1 v, vac = 0 v, rs = 220 k ? , fmc = gnd (* 1 ), fm = gnd (* 2 ), fb = comp) item symbol min typ max unit test conditions sync threshold voltage (rising) vsync 2.0 2.5 3.0 v sync min. pulse psync 2 ? ? ? s sync-out shunt current ( * 1 ) isync-s 5.0 ? ? ma synchroni- zation sync-out leakage current ( * 1 ) isync-l ? ? 1.0 ? a rs output voltage 1 vrs1 0.56 0.65 0.74 v vac = 0 v, vfb = 2.5 v rs output voltage 2 vrs2 0.04 0.14 0.26 v vac = 2.5 v, vfb = 0 v current slope vac bias current ivac ?0.4 ?0.2 ?0.05 ? a measured pin: vac soft start source current iss ?40 ?28 ?16 ? a ss = 2 v phase drop threshold voltage ( * 1 ) vpd 2.4 2.5 2.6 v phase drop hysteresis ( * 1 ) hya-pd 150 200 250 mv phase drop pd bias current ( * 1 ) ipd 0.05 0.2 0.5 ? a measured pin: pd cso offset voltage1 ( * 5 ) voffset 0.68 0.88 1.0 v vcs = 0 v cso offset voltage1 ( * 6 ) voffset 0.54 0.74 0.86 v vcs = 0 v cso offset voltage2 vcaoh 2.83 3 3.17 v vcs = 0.24 v ( * 5 ), vcs = 2.3 v ( * 6 ) cs bias current ( * 5 ) ics-r ?0.4 ?0.2 ?0.05 ? a measured pin: cs1, 2 amp1, 2 cs bias current ( * 6 ) ics-ct ?1.1 ?0.8 ?0.5 ? a measured pin: cs1, 2 gate drive rise time tr-gd ? 30 100 ns cl = 500 pf gate drive fall time tf-gd ? 30 100 ns cl = 500 pf vol1-gd ? 0.05 0.2 v isink = 10 ma gate drive low voltage vol2-gd ? 1 1.25 v isink = 0.25 ma, vcc = 5 v gate drive high voltage voh-gd 11.5 11.9 ? v isource = ?10 ma minimum duty cycle dmin-out ? ? 0 % gate drive 1, 2 maximum duty cycle dmax-out 90 95 98 % dynamic ovp threshold voltage vdovp vfb ? 1.025 vfb ? 1.040 vfb ? 1.055 v static ovp threshold voltage vsovp vfb ? 1.065 vfb ? 1.080 vfb ? 1.095 v comp = open static ovp hysteresis hys-so vp 30 80 130 mv comp = open ovp2 threshold voltage ( * 1 ) vovp2 vfb ? 1.065 vfb ? 1.080 vfb ? 1.095 ? a ovp2 hysteresis ( * 1 ) hys-ovp2 30 80 130 mv comp = open ovp2 bias current ( * 1 ) iovp2 ?0.5 ?0.3 ?0.05 ? a measured pin: ovp2 fb open detect threshold voltage vfbopen 0.45 0.5 0.55 v over voltage protection fb open detect hysteresis vfbopen 0.16 0.2 0.24 v ocp threshold voltage ( * 5 ) vcl 0.28 0.31 0.34 v ocp threshold voltage ( * 6 ) vcl 2.9 3 3.1 v over current protection delay to output td-cl ? 100 250 ns notes: * 1 applied to r2a20104fp, r2a20114fp * 2 applied to r2a20104sp, r2a20114sp * 5 applied to r2a20114fp, r2a20114sp * 6 applied to r2a20104fp, r2a20104sp
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 10 of 11 sep 03, 2010 electrical characteristics (cont.) (ta = 25c, vcc = 12 v, ct = 1000 pf, rt = 27 k ? , cs1, cs2 = gnd, iramp = 10 k ? , bo = 1 v, vac = 0 v, rs = 220 k ? , fmc = gnd (* 1 ), fm = gnd (* 2 ), fb = comp) item symbol min typ max unit test conditions error shunt current ( * 1 ) ierror-s 5.0 ? ? ma error leakage current ( * 1 ) ierror-l ? ? 1.0 ? a phase error detect point perror 1.1 1.35 1.6 ? vcso1 or 2 = 2.5 v, vcso2 or 1: sweep ( * 7 ) off threshold voltage ( * 1 ) voff 3.3 4.0 4.7 v e-delay charge current ( * 1 ) ied-c ?55 ?36 ?20 ? a e-delay discharge current ( * 1 ) ied-d 20 36 55 ? a error signal e-delay threshold voltage ( * 1 ) vdelay 2.35 2.45 2.55 v notes: * 1 applied to r2a20104fp, r2a20114fp * 2 applied to r2a20104sp, r2a20114sp * 7 refer to the figure shown below: perror = v'cso1(or 2)[v] ? 0.55[v] vcso2(or 1)[v] ? 0.55[v] error cso1(or 2) cso2(or 1) v'cso1(or 2) vcso2(or 1)
r2a20114 series preliminary r03ds0008ej0100 rev.1.00 page 11 of 11 sep 03, 2010 package dimensions ? r2a20104fp and r2a20114fp note) 1. dimensions"*1"and"*2" do not include mold flash 2. dimension"*3"does not include trim offset. 0.60 0.40 0.575 0.575 0.22 0.08 max nom min dimension in millimeters symbol reference 7.0 0.13 0.10 0.13 8.8 9.0 9.2 0.50 7.0 9.2 9.08.8 0.27 0.220.17 0.20 0.150.10 0.65 8 0 1.0 1.70 1.40 previous code jeita package code renesas code plqp0040jb-c fp-40ev mass[typ.] 0.2g p-lqfp40-7x7-0.65 e h e l a 1 d e a 2 h d a b p b 1 c x y z d z e l 1 c 1 detail f c a l terminal cross section (ni/pd/au plating) c 40 1 f mx 11 10 31 30 21 20 *3 *2 *1 index mark s y s d e e h d z d b p h e z e b p a 1 a 2 l 1 ? r2a20104fp and r2a20114fp note) 1. dimensions"*1 (nom)"and" *2" do not include mold flash. 2. dimension"*3"does not include trim offset. 12.60 1.15 0.12 0 8 7.80 0.15 0.20 0.25 0.46 0.00 0.10 0.20 5.50 0.50 0.70 0.90 2.20 reference symbol dimension in millimeters min nom max 13.0 e h e l a d e a 2 a 1 b p b 1 c x y z l 1 c 1 0.34 0.40 8.00 7.50 1.27 0.15 0.80 previous code jeita package code renesas code prsp0020dd-b fp-20dav mass[typ.] 0.31g p-sop20-5.5x12.6-1.27 terminal cross section (ni/pd/au plating) c detail f l y s s index mark 1 xm *3 *2 *1 f 10 11 20 a z e e d l 1 a 1 b p b p h e
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